BeagleLogic: now also analog

A year and half ago I published a survey on the BeagleLogic wiki where prospective visitors and users were asked which feature they wanted to see in BeagleLogic the most. I compiled the raw responses so far, here they are:BeagleLogic survey

It’s interesting that a majority of prospective users wanted to be able to do analog sampling with BeagleLogic.

And today, it becomes a reality for BeagleLogic users, thanks to the efforts of a team working at Google Research who wanted to use the BeagleBone for data acquisition and had been working independently on an ADC cape for the BeagleBone for a while. When we first got in touch, they already had a board fabricated and assembled and kindly agreed to send me a prototype to let me help BeagleLogic support the board. It excited me as not only would analog sampling support in BeagleLogic become a reality but also their project could benefit from the kernel infrastructure BeagleLogic has established to capture data using the PRUs on the BeagleBone and move it to userspace to be able to realize the full performance of the ADC which would be difficult to achieve through a libprussdrv based solution.

I am happy to tell you today about the PRUDAQ project (link to announcement on Google Open Source Blogs) – an ADC cape for the BeagleBone for doing high-speed analog data acquisition. At the heart of the board is an Analog Devices AD9201, a 10-bit ADC that can sample two channels up to 20MSPS.
PRUDAQ board
The board has been designed by Jason Holt and his team at Google Research and the team at GroupGets as the manufacturing partner have been instrumental in getting the boards manufactured and ready for sale – the board itself is available at their store, and they also offer a bundle with pre-loaded SD card and other accessories.

GroupGets is a secure platform to create or join group buys for things that are out of reach for a single buyer like a high minimum order quantity for a specialty sensor. Their GetLab engineering team also creates custom hardware and software to enhance group buy targets or make them easier to use.

PRUDAQ with the BeagleLogic stack can be a great way for high performance analog data acquisition – the PRUs and the kernel driver can handle simultaneously both channels of the ADC at sample rates up to 19.9 MSPS 1, which corresponds to a data rate of 79.6 MB/s 2. The dual-PRU architecture of BeagleLogic that maintains a clear separation between the sampling operation itself (done by PRU1) and data transfer to memory (done by PRU0) means that on an application level, only the firmware on PRU1 needs to be changed in order to support PRUDAQ, no modification is necessary on the kernel driver side, raw analog data can be directly read through /dev/beaglelogic and this also opens the door to other ADC boards or sensors being able to make use of the high-speed capture framework provided by BeagleLogic by writing suitable firmware extensions.

There’s also an update to the BeagleLogic system image that also builds in PRUDAQ support, and this will be bundled by default in all new BeagleLogic image releases. It is immediately available for download from the images page on the BeagleLogic wiki. For those interested in the firmware, it’s present in the main repository now here. To learn more about the PRUDAQ project, their wiki is a good place to start.

The performance of PRUDAQ has been documented really well and it also highlights the bottlenecks in the later part of the document, which is also relevant to the performance of BeagleLogic.

I’d also take the opportunity to announce collaboration with GroupGets for the first production batch of BeagleLogic capes and a bundle offer – while the BeagleLogic capes aren’t available today, those who purchase the first batch of the PRUDAQ boards from GroupGets will get 10% off their purchase of a BeagleLogic cape as and when it is made available from GroupGets. The first batch buyers of the board will receive a discount code in their email when it’s ready.

Congratulations to the team at Google Research and GroupGets for a successful launch! I am also very grateful to the support provided to me by the Google Summer of Code program and the Foundation in bringing this project to you over the summers 2 years ago, and looking forward to see the new applications that this will make possible.

  1. Due to the nature of the assembly code that samples the PRU pins, it is not possible to sample both channels at 20MSa/s as the external clock needs to be tracked and at 20MSa/s, samples were found to be dropped. However it works OK at 19.9 MSPS with an external clock [tests done by Jason and his team]. It is however, possible to sample both channels simultaneously at the max possible 20MSPS if PRU1 is allowed to clock the ADC. This is a special case and the firmware to do so will be made available in the future. 
  2. ADC samples are 10-bit but use up 16 bits = 2 bytes. So 19.9 MSa/S * 2 channels * 2 bytes/channel = 79.6 MB/s 
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